SUBDESIGN sdram7 ( -- I/O /reset,clki,/wr,/cs,/rd : INPUT = VCC; -- 3 a[15..0] : INPUT = VCC; -- 16 d[15..0] : BIDIR; -- 16 ma[13..0] : OUTPUT; -- 14 md[15..0] : BIDIR; -- 16 mclk,cke,cs,ras,cas,we,dqm,/rdr : OUTPUT; -- 6 test : OUTPUT; ) -- 69 ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- % ------------------------------------------------------------------------------- Контроллер Управления SDRAM ------------------------------------------------------------------------------- Базовый адрес $FF70 Размер в пространстве 16 ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- Внутренние регистры ------------------------------------------------------------------------------- ОПИСАНИЕ ИМЯ НОМЕР АДРЕС ------------------------------------------------------------------------------- Пречердж precharge 0 $FF70 Активизация строки active 1 $FF71 Чтение столбца rdcol 2 $FF72 Запись стобца wrcol 3 $FF73 Запись данных wrdat 4 $FF74 Установка режима mode 5 $FF75 Регенерация rfsh 6 $FF76 Саморегенерация srfsh 7 $FF77 Чтение данных rddat 8 $FF74 ------------------------------------------------------------------------------- Цикл записи осуществляется последовательностью ------------------------------------------------------------------------------- write to precharge DEACTIVE write to active RAS write to wrcol CAS write to wrdat WR .... write to active RAS write to wrcol CAS write to wrdat WR .... write to rfsh REFRESH .... write to precharge DEACTIVE write to srfsh SELF REFRESH START ------------------------------------------------------------------------------- Цикл записи осуществляется последовательностью ------------------------------------------------------------------------------- write to precharge DEACTIVE write to active RAS write to rdcol CAS_READ read from rddat GET DATA .... write to active RAS write to rdcol CAS_READ read from rddat GET DATA .... write to rfsh REFRESH .... write to precharge DEACTIVE write to srfsh SELF REFRESH START ------------------------------------------------------------------------------- % ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- VARIABLE ce,clk,reset,read,binp : NODE; bufd[15..0],bufa[2..0] : DFFE; cmd[2..0],msg : NODE; tmsg : DFF; rdi[15..0] : DFFE; ws : MACHINE OF BITS( b[12..0],rasa,out ) WITH STATES ( off = B"00000000000001", on = B"11000000000001", active = B"10100000000011", wrcol = B"10010000000011", rdcol = B"10001000000011", wrdat = B"10000100000001", rdnop = B"10000010000000", rdinp = B"10000001000000", mode = B"10000000100011", prech = B"10000000010011", rfsh = B"10000000001001", srfsh = B"10000000000101" ); _cke,_ras,_cas : NODE; _cs,_dqm,_we : NODE; inp,mdout : NODE; rma[15..0] : DFFE; ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- BEGIN ------------------------------------------------------------------------------- -- Выбор кристала ------------------------------------------------------------------------------- ce = !/cs & a15 & a14 & a13 & a12 & a11 & a10 & a9 & a8 & !a7 & a6 & a5 & a4; clk = !clki; reset = !/reset; mclk = !clk; --read = ce & !a3 & a2 & !a1 & !a0; read = ce & a2 & !a1 & !a0; binp = read & !/rd; /rdr = read # /rd; ------------------------------------------------------------------------------- -- Приёмник сообщения ------------------------------------------------------------------------------- bufd[].clk = /wr; bufd[].clrn = /reset; bufd[].ena = ce; bufd[].d = (d[15..13],(d12 or a3),d[11..0]); bufa[].clk = /wr; bufa[].clrn = /reset; bufa[].ena = ce; bufa[].d = a[2..0]; cmd[] = bufa[].q; tmsg.clk = clk; tmsg.clrn = /reset; --tmsg.d = !/wr and ce; tmsg.d = DFF(ce,/wr,!tmsg.q,VCC); msg = tmsg.q; ------------------------------------------------------------------------------- -- Служебные адресные линии и адреса ------------------------------------------------------------------------------- IF ((ws == wrcol) or (ws == rdcol)) THEN rma[].d = (rma[15..14].q,0,bufd[12],bufd[7..0].q,rma[1..0].q,rma[1..0].q+1); ELSE rma[].d = bufd[15..0].q; END IF; rma[].clk = clk; rma[].clrn = /reset; rma[].ena = ws.rasa; ma[] = rma[15..2].q; ------------------------------------------------------------------------------- -- Шина данных чтение ------------------------------------------------------------------------------- rdi[].clk = clk; rdi[15..3].clrn = /reset; rdi[2..0].prn = /reset; rdi[].ena = inp; rdi[].d = md[]; FOR n IN 0 TO 15 GENERATE d[n] = TRI(rdi[n].q,binp); END GENERATE; ------------------------------------------------------------------------------- -- Шина данных запись ------------------------------------------------------------------------------- FOR n IN 0 TO 15 GENERATE md[n] = TRI(bufd[n].q,mdout); END GENERATE; ------------------------------------------------------------------------------- -- МАШИНА СОСТОЯНИЙ РАБОЧИХ ЦИКЛОВ ------------------------------------------------------------------------------- ws.clk = clk; ws.reset= reset; TABLE %=============================================================================% ws, msg, cmd[] => ws; %=============================================================================% off, X, X => on; ------------------------------------------------------------------------------- on, 0, X => on; on, 1, 0 => prech; on, 1, 1 => active; on, 1, 2 => rdcol; on, 1, 3 => wrcol; on, 1, 4 => wrdat; on, 1, 5 => mode; on, 1, 6 => rfsh; on, 1, 7 => srfsh; ------------------------------------------------------------------------------- active, X, X => on; ------------------------------------------------------------------------------- wrcol, X, X => on; ------------------------------------------------------------------------------- rdcol, X, X => rdnop; rdnop, X, X => rdinp; rdinp, X, X => on; ------------------------------------------------------------------------------- wrdat, X, X => on; ------------------------------------------------------------------------------- mode, X, X => on; ------------------------------------------------------------------------------- rfsh, X, X => on; ------------------------------------------------------------------------------- srfsh, 0, X => srfsh; srfsh, 1, 0 => on; ------------------------------------------------------------------------------- prech, X, X => on; %=============================================================================% END TABLE; test = ce; ------------------------------------------------------------------------------- -- СИГНАЛЫ УПРАВЛЕНИЯ ПАМЯТЬЮ ------------------------------------------------------------------------------- _cke = !ws.off & !ws.srfsh & !ws.rdnop; _ras = ws.mode # ws.srfsh # ws.active # ws.prech # ws.rfsh; _cas = ws.mode # ws.srfsh # ws.rdcol # ws.rfsh # ws.wrdat; _cs = !ws.on & !ws.off & !ws.wrcol & !ws.rdnop & !ws.rdinp; --_cs = !(ws.on # ws.off # ws.wrcol # ws.rdnop # ws.rdinp); _we = ws.mode # ws.prech # ws.wrdat; _dqm = ws.rdcol # ws.rdnop # ws.wrdat # ws.rdinp; ras = DFF( !_ras, clk, VCC,/reset ); cas = DFF( !_cas, clk, VCC,/reset ); we = DFF( !_we, clk, VCC,/reset ); dqm = DFF( !_dqm, clk, VCC,/reset ); cs = DFF( !_cs, clk, VCC,/reset ); cke = DFF( _cke, clk, /reset,VCC ); inp = DFF( DFF( ws.rdinp , clk, /reset,VCC ) , clk, /reset,VCC ); mdout = DFF( DFF( ws.out,clk, VCC, /reset) & ws.out,clk, VCC, /reset); ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- ------------------------------------------------------------------------------- END;